Design of Low Power Si Based DPA for Medical Device
Wei Cai; Frank Shi
A method for designing and simulating a power amplifier in IBM 's CMOS 180 nm process is presented. This novel power amplifier is intended for sensor networks, which can be integrated at the SIP level with an objective of realizing a low cost and low power system. The results implied that the power level can be reach by the 15 dBm, while PAE could reach 15% when the input power is not high. Future topology will continue to be improved